LOW POWER ARITHMETIC CIRCUITS USING FINFET DEVICE IN 32NM TECHNOLOGY
Kumar, V.M.S and Saravanan, S LOW POWER ARITHMETIC CIRCUITS USING FINFET DEVICE IN 32NM TECHNOLOGY. IIOAB Journal.
Full text not available from this repository. (Request a copy)Abstract
A low power computing device design is the objective of the work. The objective is met using FinFET and inexact computing methods. AFinFET based arthmetic circuits for the processing element units in DSP application is to be designed and proposed. Materials and methods:The circuits are modelled using predictive technology models in 32nm FinFET technology. The proposed arthmetic circuits are a half adder, a full adder and a multiplier. A 4-2 compressor based multiplier is proposed in this paper which reduces the number of operands and partial products. Using compressors for the multiplier reduces the number of interconnects and components. Results:The proposed FinFET based circuits reduces the leakage current which ultimately results in the reduction of power consumption. As CMOS circuits performance reduces when fabricated below 45nm technology , FinFET devices is the alteranative solution. This work embasis on the design of circuits using FinFET. Conclusion:The proposed circuits are compared with the existing counterparts and found that the performanceimprovement is96% on average with the existing CMOS circuits . The modelling andsimulations were carried out using Synopsis HSPICE
| Item Type: | Article |
|---|---|
| Subjects: | Computer Science and Engineering > Deep learning |
| Divisions: | Computer Science and Engineering |
| Depositing User: | Unnamed user with email techsupport@mosys.org |
| Date Deposited: | 30 Oct 2026 06:49 |
| Last Modified: | 30 Oct 2026 06:49 |
| URI: | https://ir.vcenggw.ac.in/id/eprint/557 |
