Low Power Design of 0.8V based 8 Bit Content Addressable Memory using MSML implemented in 22nm Technology for Aeronautical Applications

Proposed Paper contains Master slave match line
(MSML) architecture which is implemented in traditional Content
Addressable Memory (CAM) cell for storing 8 bit of data.
Objective of the proposed methodology is to improve searching
speed with less power consumption. MSML operation depends on
two things one is Master Match Line (MML) and slave match line
(SML). Design is performed using SPICE in 22nm technology
which is weightless and can be used in Aeronautical Equipment.
Various parameters such as temperature, power and delay are
calculated for various types of CAM cell. Proposed methodology
power consumption is found to be 598mw with delay of 5.98ns for
22nm technology.